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? 2005 microchip technology inc. ds21486c-page 1 tcm680 features ? 99% voltage conversion efficiency ? 85% power conversion efficiency ? input voltage range: - +2.0v to +5.5v ? only 4 external capacitors required ? 8-pin soic package applications ? 10v from +5v logic supply ? 6v from a 3v lithium cell ? handheld instruments ? portable cellular phones ? lcd display bias generator ? panel meters ? operational amplifier power supplies typical operating circuit general description the tcm680 is a dual charge pump, voltage converter that produces output voltages of +2v in and -2v in from a single input voltage of +2.0v to +5.5v. common applications include 10v from a single +5v logic supply and 6v from a +3v lithium battery. the tcm680 is packaged in 8-pin soic and pdip packages and requires only four inexpensive, external capacitors. the charge pumps are clocked by an on- board 8 khz oscillator. low output source impedances (typically 140 ) provide maximum output currents of 10 ma for each output. typical power conversion effi- ciency is 85%. high efficiency, small size and low cost make the tcm680 suitable for a wide variety of applications that need both positive and negative power supplies derived from a single input voltage. package type v out - = -(2 x v in ) gnd tcm680 v out + + + + gnd gnd + v out + = (2 x v in ) +5v v in v out - c 1 + c 2 + c 1 - c 2 - c 1 4.7 f c 2 4.7 f c 4 4.7 f c 3 4.7 f 1 2 3 4 8 7 6 5 tcm680cpa tcm680epa gnd v out - c 1 + pdip v in c 2 + c 1 - c 2 - v out + 1 2 3 4 8 7 6 5 tcm680coa tcm680eoa gnd v out - c 1 + soic v in c 2 + c 1 - c 2 - v out + +5v to 10v voltage converter obsolete device
tcm680 ds21486c-page 2 ? 2005 microchip technology inc. 1.0 electrical characteristics absolute maximum ratings? v in .......................................................................+5.8v v out + ................................................................ +11.6v v out ? .................................................................-11.6v v out + short-circuit duration...................... continuous v out + current ....................................................75 ma v in dv/dt ....................................................... 1 v/sec power dissipation (t a 70c) 8-pin pdip ..............................................730 mw 8-pin soic ..............................................470 mw operating temperature range.............-40c to +85c storage temperature range ..............-65c to +150c maximum junction temperature ...................... +150c ? notice: stresses above those listed under "maximum ratings" may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. exposure to maximum rating conditions for extended periods may affect device reliability dc characteristics electrical specifications: unless otherwise noted, v in = +5v, t a = +25c, refer to figure 1-1. parameters sym min typ max units conditions supply voltage range v in 2.0 ? 5.5 v -40c t a +85c, r l = 2 k supply current i in ?0.51.0mav in = 3v, r l = ?1.02.0 v in = 5v, r l = ??2.5 v in = 5v, 0c t a + 70c, r l = ??3.0 v in = 5v, -40c t a + 85c, r l = negative charge pump output source resistance r out - ? 140 180 i l ? = 10 ma, i l + = 0 ma, v in = 5v ? 180 250 i l ? = 5 ma, i l + = 0 ma, v in = 2.8v ? ? ? ? ? ? 220 250 ? 0c t a + 70c -40c t a + 85c i l ? = 10 ma, i l + = 0 ma, v in = 5v positive charge pump output source resistance r out + 140 180 i l + = 10 ma, i l ? = 0 ma, v in = 5v ? 180 250 i l + = 5 ma, i l ? = 0 ma, v in = 2.8v ? ? ? ? ? ? 220 250 ? 0c t a + 70c -40c t a + 85c i l + = 10 ma, i l ? = 0 ma, v in = 5v oscillator frequency f osc ?21?khz power efficiency p eff ?85?%r l = 2 k voltage conversion efficiency v outeff 97 99 ? % v out + , r l = 97 99 ? v out ? , r l =
? 2005 microchip technology inc. ds21486c-page 3 tcm680 figure 1-1: test circuit used for dc characteristics table. c 3 gnd gnd tcm680 4.7 f 4.7 f 10 f c 4 10 f 8 7 6 5 4 3 2 1 r l + + + + v in c 1 + c 2 + c 1 - c 2 - v out - c 1 c 2 v out + v out - v out + r l - + v in
tcm680 ds21486c-page 4 ? 2005 microchip technology inc. 2.0 typical performance curves note: unless otherwise indicated, v in = +5v, t a = +25c. figure 2-1: output resistance vs. v in . figure 2-2: supply current vs. v in . figure 2-3: output source resistance vs. temperature. figure 2-4: v out + or v out - vs. load current. figure 2-5: output voltage vs. output current. note: the graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. the performance characteristics listed herein are not tested or guaranteed. in some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. 1 2 3 456 v in (v) r out 300 250 200 150 100 output resistance ( ) c 1 = c 4 = 10 f 1 2 3 456 v in (v) 1.4 1.2 1.0 0.8 0.6 0.4 0.2 supply current (ma) r l = r out -50 0 50 100 tem p erature ( ?c ) 180 160 140 120 100 output source resistance ( ) i out = 10 ma 0 5 10 1 5 load current (ma) 10.0 9.0 8.0 7.0 v out (v) 10.0 9.0 8.0 7.0 v out (v) 0 2 4 6810 output current (ma) from v out + to v out
? 2005 microchip technology inc. ds21486c-page 5 tcm680 3.0 pin description the descriptions of the pins are listed in table 3-1. table 3-1: pin function table 3.1 first charge pump capacitor (c 1 - ) negative connection for the charge pump capacitor (flying capacitor) used to transfer charge from the input source to a second charge pump capacitor. this charge pump capacitor is used to double the input volt- age and store the charge in the second charge pump capacitor. it is recommended that a low esr (equivalent series resistance) capacitor be used. additionally, larger values will lower the output resistance. 3.2 second charge pump capacitor (c 2 + ) positive connection for the second charge pump capacitor (flying capacitor) used to transfer charge from the first charge pump capacitor to the output. it is recommended that a low esr (equivalent series resistance) capacitor be used. additionally, larger values will lower the output resistance. 3.3 second charge pump capacitor (c 2 - ) negative connection for the second charge pump capacitor (flying capacitor) used to transfer charge from the first charge pump capacitor to the output. proper orientation is imperative when using a polarized capacitor. 3.4 negative output voltage (v out - ) negative connection for the negative charge pump out- put capacitor. the negative charge pump output capac- itor supplies the output load during the first, third and fourth phases of the switching cycle. during the second phase of the switching cycle, charge is restored to the negative charge pump output capacitor. the negative output voltage magnitude is approximately twice the input voltage. it is recommended that a low esr (equivalent series resistance) capacitor be used. additionally, larger values will lower the output ripple. 3.5 ground (gnd) input zero volt reference. 3.6 power supply input (v in ) positive power supply input voltage connection. it is recommended that a low esr (equivalent series resis- tance) capacitor be used to bypass the power supply input to ground (gnd). 3.7 first charge pump capacitor (c 1 + ) positive connection for the charge pump capacitor (fly- ing capacitor) used to transfer charge from the input source to a second charge pump capacitor. proper orientation is imperative when using a polarized capacitor. 3.8 positive output voltage (v out + ) positive connection for the positive charge pump out- put capacitor. the positive charge pump output capac- itor supplies the output load during the first, second and third phases of the switching cycle. during the fourth phase of the switching cycle, charge is restored to the positive charge pump output capacitor. the positive output voltage magnitude is approximately twice the input voltage. it is recommended that a low esr (equivalent series resistance) capacitor be used. additionally, larger values will lower the output ripple. pin no. (8-pin pdip, soic) symbol description 1c 1 - input. first charge pump capacitor. negative connection 2c 2 + input. second charge pump capacitor. positive connection. 3c 2 - input. second charge pump capacitor. negative connection. 4v out - output. negative output voltage 5 gnd input. ground connection. 6v in input. power supply. 7c 1 + input. first charge pump capacitor. positive connection. 8v out + output. positive output voltage.
tcm680 ds21486c-page 6 ? 2005 microchip technology inc. 4.0 detailed description 4.1 v out - charge storage - phase 1 the positive side of capacitors c 1 and c 2 are con- nected to +5v at the start of this phase. c 1 + is then switched to ground and the charge in c 1 ? is transferred to c 2 ? . since c 2 + is connected to +5v, the voltage potential across capacitor c 2 is now 10v. figure 4-1: charge pump - phase 1. 4.2 v out - transfer - phase 2 phase two of the clock connects the negative terminal of c 2 to the v out - storage capacitor c 3 and the positive terminal of c 2 to ground, transferring the generated -10v to c 3 . simultaneously, the positive side of capac- itor c 1 is switched to +5v and the negative side is connected to ground. figure 4-2: charge pump - phase 2. 4.3 v out + charge storage - phase 3 the third phase of the clock is identical to the first phase ? the charge stored in c 1 produces -5v in the negative terminal of c 1 , which is applied to the negative side of capacitor c 2 . since c 2 + is at +5v, the voltage potential across c 2 is 10v. figure 4-3: charge pump - phase 3. 4.4 v out + transfer - phase 4 the fourth phase of the clock connects the negative terminal of c 2 to ground and transfers the generated 10v across c 2 to c 4 , the v out + storage capacitor. simultaneously, the positive side of capacitor c 1 is switched to +5v and the negative side is connected to ground, and the cycle begins again. figure 4-4: charge pump - phase 4. v out - v out + -5v sw 4 sw 1 sw 2 sw 3 c 4 + ? + + ? ? + ? v in = +5v c 2 c 3 c 1 v out - v out + -5v sw 4 sw 1 sw 2 sw 3 c 4 + ? + + ? ? + ? +5v c 2 c 3 c 1 -10v v out - v out + -5v sw 4 sw 1 sw 2 sw 3 c 4 + ? + + ? ? + ? v in = +5v c 2 c 3 c 1 -10v v out - v out + -5v sw 4 sw 1 sw 2 sw 3 c 4 + ? + + ? ? + ? +5v c 2 c 3 c 1
? 2005 microchip technology inc. ds21486c-page 7 tcm680 4.5 maximum operating limits the maximum input voltage rating must be observed. the tcm680 will clamp the input voltage to 5.8v. exceeding this maximum threshold will cause exces- sive current to flow through the tcm680, potentially causing permanent damage to the device. 4.6 switched capacitor converter power losses the overall power loss of a switched capacitor converter is affected by four factors: 1. losses from power consumed by the internal oscillator, switch drive, etc. these losses will vary with input voltage, temperature and oscillator frequency. 2. conduction losses in the non-ideal switches. 3. losses due to the non-ideal nature of the external capacitors. 4. losses that occur during charge transfer from the pump to reservoir capacitors when a voltage difference between the capacitors exists. the power loss for the tcm680 is calculated using the following equation: equation p loss = (i out+ ) 2 x r out - + (i out- ) 2 x r out + + i in x v in
tcm680 ds21486c-page 8 ? 2005 microchip technology inc. 5.0 applications information 5.1 voltage multiplication and inversion the tcm680 performs voltage multiplication and inver- sion simultaneously, providing positive and negative outputs (figure 5-1). the magnitude of both outputs is, approximately, twice the input voltage. unlike other switched capacitor converters, the tcm680 requires only four external capacitors to provide both functions simultaneously. figure 5-1: positive and negative converter. 5.2 capacitor selection the tcm680 requires only 4 external capacitors for operation, which can be inexpensive, polarized alumi- num electrolytic types. for the circuit in figure 5-1, the output characteristics are largely determined by the external capacitors. an expression for r out can be derived as shown below: equation assuming all switch resistances are approximately equal: equation r out is typically 140 at +25c with v in = +5v and c 1 and c 2 as 4.7 f low esr capacitors. the fixed term (32r sw ) is about 130 . it can easily be seen that increasing or decreasing values of c 1 and c 2 will affect efficiency by changing r out . however, be careful about esr. this term can quickly become dominant with large electrolytic capacitors. table 5-1 shows r out for various values of c 1 and c 2 (assume 0.5 esr). c 1 and c 4 must be rated at 6 vdc or greater while c 2 and c 3 must be rated at 12 vdc or greater. output voltage ripple is affected by c 3 and c 4 . typically, the larger the value of c 3 and c 4 , the less the ripple for a given load current. the formula for v ripple(p-p) is given below: equation for a 10 f (0.5 esr) capacitor for c 3 , c 4 , f pump = 21 khz and i out = 10 ma, the peak-to-peak ripple voltage at the output will be less than 100 mv. in most applications (i out 10 ma), 10-20 f output capacitors and 1-5 f pump capacitors will suffice. table 5-2 shows v ripple for different values of c 3 and c 4 (assume 1 esr). table 5-1: output resistance vs. c 1 , c 2 table 5-2: v ripple peak-to-peak vs. c 3 , c 4 (i out 10 ma) gnd gnd tcm680 8 7 6 5 4 3 2 1 + + + v in c 1 + c 2 + c 1 - v out - v out + v out - v out + + v in c 1 22 f c 2 22 f c 4 22 f c 3 22 f c 2 - r out + =4(r sw1 +r sw2 +esr c1 +r sw3 +r sw4 +esr c2 ) +4(r sw1 +r sw2 +esr c1 +r sw3 +r sw4 +esr c2 ) +1/(f pump x c1) + 1/(f pump x c2) + esr c4 r out ? =4(r sw1 +r sw2 +esr c1 +r sw3 +r sw4 +esr c2 ) +4(r sw1 +r sw2 +esr c1 +r sw3 +r sw4 +esr c2 ) +1/(f pump x c1) + 1/(f pump x c2) + esr c3 r out + = 32r sw + 8esr c1 + 8esr c2 + esr c4 +1/(f pump x c1) + 1/(f pump x c2) r out ? = 32r sw + 8esr c1 + 8esr c2 + esr c3 +1/(f pump x c1) + 1/(f pump x c2) c 1 , c 2 (f) r out + , r out - ( ) 0.1 1089 0.47 339 1232 3.3 165 4.7 157 10 146 22 141 100 137 c 3 , c 4 (f) v ripple(p-p) + ,v ripple(p-p) - ( mv ) 0.47 1540 1734 3.3 236 4.7 172 10 91 22 52 100 27 v ripple(p-p) + ={1/[2(f pump /3) x c4] + 2(esr c4 )} (i out + ) v ripple(p-p) ? ={1/[2(f pump /3) x c3] + 2(esr c3 )} (i out ? )
? 2005 microchip technology inc. ds21486c-page 9 tcm680 5.3 paralleling devices to reduce the value of r out - and r out + , multiple tcm680 voltage converters can be connected in paral- lel (figure 5-2). the output resistance of both outputs will be reduced, approximately, by a factor of n, where n is the number of devices connected in parallel. equation equation each device requires its own pump capacitors, but all devices may share the same reservoir capacitors. to preserve ripple performance, the value of the reservoir capacitors should be scaled according to the number of devices connected in parallel. 5.4 output voltage regulation the outputs of the tcm680 can be regulated to provide +5v from a 3v input source (figure 5-3). the tcm680 performs voltage multiplication and inversion produc- ing output voltages of, approximately, +6v. the tcm680 outputs are regulated to +5v with the linear regulators tc55 and tc59. the tc54 is a voltage detector providing an indication that the input source is low and that the outputs may fall out of regulation. the input source to the tcm680 can vary from 2.8v to 5.5v without adversely affecting the output regulation mak- ing this application well suited for use with single cell li-ion batteries or three alkaline or nickel based batteries connected in series. figure 5-2: paralleling tcm680 for lower output source resistance. r out - = r out - (of tcm680) n (number of devices) r out + = r out + (of tcm680) n (number of devices) 10 f 10 f 22 f v in gnd gnd supply tcm680 tcm680 + ? + ? + ? + ? + ? v in c 1 + c 2 + c 1 - c 2 - v out - v out - 10 f 10 f v in gnd c 1 + c 2 + c 1 - c 2 - negativ e supply positive 22 f + ? v out + v out +
tcm680 ds21486c-page 10 ? 2005 microchip technology inc. figure 5-3: split supply derived from 3v battery. v ss v ss gnd tcm680 3v ground -5 supply low battery tc54vc2702exx 1f + ? + ? + ? + ? + ? 10 f 10 f v in c 1 + c 2 + c 1 - c 2 - v out - v ss tc55rp5002exx +5 supply 1f + ? c out + 22 f + ? +6v -6v c out - 22 f v in v in v in tc595002ecb v out v out v out
? 2005 microchip technology inc. ds21486c-page 11 tcm680 6.0 packaging information 6.1 packaging marking information xxxxxxxx xxxxxnnn yyww 8-lead pdip (300 mil) example: 8-lead soic (150 mil) example: xxxxxxxx xxxxyyww nnn tcm680 cpa123 0231 tcm680 coa0231 123 legend: xx...x customer specific information* yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer specific information. * standard otp marking consists of microchip part number, year code, week code, and traceability code.
tcm680 ds21486c-page 12 ? 2005 microchip technology inc. 8-lead plastic dual in-line (p) ? 300 mil (pdip) b1 b a1 a l a2 p e eb c e1 n d 1 2 units inches* millimeters dimension limits min nom max min nom max number of pins n 88 pitch p .100 2.54 top to seating plane a .140 .155 .170 3.56 3.94 4.32 molded package thickness a2 .115 .130 .145 2.92 3.30 3.68 base to seating plane a1 .015 0.38 shoulder to shoulder width e .300 .313 .325 7.62 7.94 8.26 molded package width e1 .240 .250 .260 6.10 6.35 6.60 overall length d .360 .373 .385 9.14 9.46 9.78 tip to seating plane l .125 .130 .135 3.18 3.30 3.43 lead thickness c .008 .012 .015 0.20 0.29 0.38 upper lead width b1 .045 .058 .070 1.14 1.46 1.78 lower lead width b .014 .018 .022 0.36 0.46 0.56 overall row spacing eb .310 .370 .430 7.87 9.40 10.92 mold draft angle top 51015 51015 mold draft angle bottom 51015 51015 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed jedec equivalent: ms-001 drawing no. c04-018 .010? (0.254mm) per side. significant characteristic
? 2005 microchip technology inc. ds21486c-page 13 tcm680 8-lead plastic small outline (sn) ? narrow, 150 mil (soic) foot angle 048048 15 12 0 15 12 0 mold draft angle bottom 15 12 0 15 12 0 mold draft angle top 0.51 0.42 0.33 .020 .017 .013 b lead width 0.25 0.23 0.20 .010 .009 .008 c lead thickness 0.76 0.62 0.48 .030 .025 .019 l foot length 0.51 0.38 0.25 .020 .015 .010 h chamfer distance 5.00 4.90 4.80 .197 .193 .189 d overall length 3.99 3.91 3.71 .157 .154 .146 e1 molded package width 6.20 6.02 5.79 .244 .237 .228 e overall width 0.25 0.18 0.10 .010 .007 .004 a1 standoff 1.55 1.42 1.32 .061 .056 .052 a2 molded package thickness 1.75 1.55 1.35 .069 .061 .053 a overall height 1.27 .050 p pitch 8 8 n number of pins max nom min max nom min dimension limits millimeters inches* units 2 1 d n p b e e1 h l c 45 a2 a a1 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010? (0.254mm) per side. jedec equivalent: ms-012 drawing no. c04-057 significant characteristic
tcm680 ds21486c-page 14 ? 2005 microchip technology inc. notes:
? 2005 microchip technology inc. ds21486c-page15 tcm680 product identification system to order or obtain information, e.g. , on pricing or delivery, refer to the factory or the listed sales office. sales and support data sheets products supported by a preliminary data sheet may have an e rrata sheet describing minor operational differences and recom- mended workarounds. to determine if an erra ta sheet exists for a particular device, please contact one of the following: 1. your local microchip sales office 2. the microchip corporate literature center u.s. fax: (480) 792-7277 3. the microchip worldwide site (www.microchip.com) please specify which device, revision of silicon and data sheet (include literature #) you are using. new customer notification system register on our web site (www.microchip.com/cn) to receive the most current information on our products. part no. x /xx package temperature range device device: tcm680: charge pump converter temperature range: c = 0c to +70c e = -40c to +85c package: pa = plastic dip (300 mil body), 8-lead oa = plastic soic, (150 mil body), 8-lead oatr = plastic soic, (150 mil body), 8-lead (tape and reel) examples: a) tcm680coa: charge pump converter, soic pkg, 0c to +70c. b) tcm680coatr: charge pump converter, soic pkg, 0c to +70c, tape and reel. c) tcm680cpa: charge pump converter, pdip pkg, 0c to +70c. d) tcm680eoa: charge pump converter, soic pkg, -40c to +85c. e) tcm680eoatr: charge pump converter, soic pkg, -40c to +85c, tape and reel. f) tcm680epa: charge pump converter, pdip pkg, -40c to +85c.
tcm680 ds21486c-page 16 ? 2005 microchip technology inc. notes:
? 2005 microchip technology inc. ds21486c-page 17 information contained in this publication regarding device applications and the like is prov ided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application m eets with your specifications. microchip makes no representations or war- ranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip?s products as critical components in life support systems is not authorized except with express written approval by microchip. no licenses are conveyed, implicitly or otherwise, under any microchip intellectual property rights. trademarks the microchip name and logo, the microchip logo, accuron, dspic, k ee l oq , micro id , mplab, pic, picmicro, picstart, pro mate, powersmart, rfpic, and smartshunt are registered trademarks of micr ochip technology incorporated in the u.s.a. and other countries. amplab, filterlab, migratable memory, mxdev, mxlab, picmaster, seeval, smartsensor and the embedded control solutions company are registered trademarks of microchip technology incorporated in the u.s.a. analog-for-the-digital age, app lication maestro, dspicdem, dspicdem.net, dspicworks, ecan, economonitor, fansense, flexrom, fuzzylab, in-circuit serial programming, icsp, icepic, linear active thermistor, mpasm, mplib, mplink, mpsim, pickit, picdem, picdem.net, piclab, pictail, powercal, powerinfo, powermate, powertool, rflab, rfpicdem, select mode, smart serial, smarttel, total endurance and wiperlock are trademarks of microchip tec hnology incorporated in the u.s.a. and other countries. sqtp is a service mark of mi crochip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2005, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. note the following details of the code protection feature on microchip devices: ? microchip products meet the specification cont ained in their particular microchip data sheet. ? microchip believes that its family of products is one of the most secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal methods used to breach the code protection feature. all of these methods, to our knowledge, require using the microchip produc ts in a manner outside the operating specif ications contained in microchip?s data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are co mmitted to continuously improvin g the code protection features of our products. attempts to break microchip?s code protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2002 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona and mountain view, california in october 2003. the company?s quality system processes and procedures are for its picmicro ? 8-bit mcus, k ee l oq ? code hopping devices, serial eeproms, microperipherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified.
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